At this year’s RISC-V World Conference China, a team of more than two dozen students and professors from the Chinese Academy of Science (CAS) have unveiled the XiangShan processor that promises big performance gains over current RISC-V options.
XiangShan has been developed as an open source project with a BSD-like Mulan PSL v2 license. Since its inception in June of 2021 contributors have submitted more than 50,000 lines of code and published 400 documents.
One of the more interesting features of XiangShan is that its code is written in the Chisel hardware description language. Its creators say that resulted in a codebase that’s 1/5 the size it would be if it had been written in the older Verilog language.
That lines up with what a DARPA spokesperson said about Chisel back in 2018 when the Electronics Resurgence Initiative was launched.
The first XiangShan prototype will be an 8-core chip clocked somewhere around 1.3Ghz fabricated using TSMC’s 28nm process. It’s due to be taped out by the end of this month.
Its successor has already been planned. The CAS team hopes to have this new chip — which will utilize China-based SMIC’s 14nm process and hit clock speeds around 2Ghz — will be ready for tape-out by the end of this year.
Future iterations, CNX Software reports, should rival ARM’s Cortex-A76 processor in terms of performance.
There’s a long way to go, of course, before that goal is realized. It’s also not totally clear whether the XiangShan processor will be commercialized, though the Chinese government has been actively seeking alternatives to x86 and ARM for quite some time.
The XiangShan team also sees the processor as “milestone event in the field of Chinese chips and even the world’s chips,” adding that the open source chip could revolutionize “the field of information infrastructure.”
Ominously, the CAS’s Bao Yungang adds “any blocking this change, especially the United States, will become the biggest victim in this blocking process.”