Intel’s new Lakefield processors represent a big step for the chip maker. Like ARM’s big.LITTLE technology, these chips combine two different types of CPU core into a single package, although Intel accomplishes this in a different way thanks to its new Foveros 3D chip stacking technology.
The company has been talking about Foveros and Lakefield for more than a year, and last month Intel finally launched the first two chips. They’re 5-core processors that combine one Intel “Sunny Cove” high-performance CPU core with four energy-efficient “Tremont” cores.
Theoretically that gives you a burst of power when you need it, but low power consumption for most tasks. But as AnandTech explains in its (very) deep dive into the new Lakefield architecture, in practice, it’s likely that devices with Lakefield chips won’t offer much of a performance boost over existing Amber Lake chips like the Intel Core i7-8500Y because most of the time you’re going to be relying on the lower-performance CPU cores.
On the bright side, Lakefield chips do include a significant GPU upgrade — they feature Intel Gen11 graphics, compared to the Gen9.5 graphics you get with Amber lake chips. But that upgrade won’t necessarily help as much as you’d think, because the GPU will be clocked at just 500 MHz.
The good news is that we can expect small chip and motherboard sizes, enabling PC makers to offer thin, light, and fanless devices with long battery life. But since we already know that some of the first Lakefield-powered devices will be premium computers like the Microsoft Surface Neo, Samsung Galaxy Book S, and Lenovo ThinkPad X1 Fold, it’s likely that customers will be underwhelmed by the price to performance ratio.
Still, Lakefield is just the first step in Intel’s foray into 3D chip stacking and heterogenous computing (combining different CPU cores to work together on a single chip). So maybe the next-gen version will be more exciting.
- The Intel Lakefield Deep Dive: Everything to know about the first x86 Hybrid CPU [AnandTech]
This deep dive into Intel’s new Lakefield architecture explains how the first Intel “hybrid” x86 chip with both Core and Atom parts works. One key takeaway: It’s basically a quad-core Atom chip with occasional speed bursts from a high-performance Core. - T-Mobile deactivates Sprint’s legacy 2.5 GHz 5G ahead of re-deployments [Fierce Wireless]
T-Mobile has begun shutting down Sprint’s 5G network in preparation for setting up a new,combined network. But if you bought pretty much any Sprint 5G phone other than a Galaxy S20 5G, you’ll need to upgrade to use the new 5G network. - Google confirms the Pixel 3a has been discontinued [Android Police]
Google Pixel 3a is sold out at the Google Store, and the company says it has no plans to replenish stock. It’s basically discontinued, although third-party stores may still have some inventory for a while. The Pixel 4a has yet to be officially announced. - Cooler Master Pi Case 40 [Cooler Master]
Cooler Master announces an upcoming Raspberry Pi case featuring aluminum and TPU materials, passive cooling, a remapable on/off button, and VESA mount compatibility. Pricing TBA, and the case will launch through a crowdfunding campaign in 5 days. - The Zoom H8 Handy Recorder [Zoom YouTube]
Zoom (the one that makes audio recorders, not video conferencing) just dropped the Zoom H8 handheld recorder with 6 XLR inputs and support for up to 12 tracks (with an add-on module).
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To be honest, this is a great innovation.
It’s just the execution is quite lacking, and on top of that, it’s a couple years too late.
Just imagine a SoC such as:
3x Big processor (Core M/i-Y), eg/ 8500Y
5x Small processor (Atom X7), eg/ 8750Z
Idle usage:
(Idle) 4x Small Cores run at 500MHz at Idle
(Very-low power) 4x Small Cores clock starting at 1.0GHz
(Low-power use) 5x Small Cores clock upto 2.5GHz
(Medium power) 3x Big Cores starting at 1.5GHz, 5x Small Cores upto 2.5GHz
(Regular power) 3x Big Cores at 2.0GHz, 5x Small Cores at 2.0GHz
(High-power use) 3x Big Cores at 3.0GHz, 5x Small Cores at 2.5GHz
(Very-high power) 3x Big Cores at 4.0GHz, 5x Small Cores at 2.5GHz
(Max-power use) 1x Big Cores at 5.0GHz, 2x Big Cores at 4.0GHz, 5x Small Cores at 2.5GHz
Now imagine all of this, competing against AMD.
Their 12nm node is fairly competitive against Intel’s 14nm. And their Zen+ architecture is somewhat competitive against Intel’s Skylake architecture. So comparing the above Hybrid Processor, to a 4c/8t (eg/ Ryzen-3780U). Well that’s a no contest victory for Intel. And AMD would struggle to fit those technologies into a 8-core laptop processor.
Once AMD steps up to either Zen2 architecture, or 7nm node, or both!
….that’s when things get heated. Since in the 15W / Ultrabook market, the above setup by Intel would secure a slim victory against similar 4c/8t AMD processors. But when you step up to the 25W / Laptop market, then AMD will pull ahead with their 8c/16t processor. However at least in this scenario, Intel has a good showing of their competitiveness and capabilities. That works upto 2021, but after that, Intel will have to make noticeable performance improvements to both Big/Small architectures, AND, they will have to make substantial efficiency improvements on the lithography side (maybe execute on their 8nm nodes, versus TSMC’s 5nm).
First question, why use examples of Cherry Trail and Amber Lake?
Well, they’re both on Intel’s (pretty good) 14nm node. Also this is the most efficient “Small Core” Atom architecture that Intel has. Later produced Intel Pentium/Celeron/Atom processors come from the same family, however, they’re designed for higher energy consumption. Whereas the “Big Core” stated above is a Core M processor (now rebranded as a Core i7-Y), and it is the latest and best they have when it comes to performance whilst maintaining efficiency.
Why the 3/5 Split you may ask?
Well, the most useful is the first/main thread. Followed closely by the second thread as most code has evolved for Dual-Cores in the past 20 years. And somewhat important is the third core, as we’ve also had an evolution to Quad-Cores in the past 10 years. However, most code hasn’t made the full transition from single to dual threads, the same way that dual threads haven’t translated well to quad threads. So instead of 2+6 split, which will have some performance drops on Quad thread code, it’s better to go for 3+5. So you may ask, then why not just go for an even 4+4 split? Well, most of those quad threads don’t utilise the 4th core very well, so we can make do by relegating that to a Small Core instead. This saves us some efficiency, which is what we want to achieve with this concept in the first place. The least energy using split would be 0+8. The most performant split would be 8+0. So this 3+5 split is basically the best of both worlds, since you will get 90% of the single-threaded performance, 70% of the multi-threaded performance, and 50% of the energy expenditure characteristics. So it’s not perfect, but it’s the closest you can get there… until the code evolves further.
Reading the AnandTech article, it seems the Sunny Cove core is only used for short burst to speed up latency sensitive actions: “such as tapping on the screen, typing on the keyboard.”
Longer running heavy single-threaded workloads or multi-threaded ones, end up only using the Atom cores while the Sunny Cove core sits idle. I wonder what use cases will actually see any perceived performance improvements of just a 4-core Atom SoC. AnandTech says
“In practice, it’s likely that devices with Lakefield chips won’t offer much of a performance boost over existing Amber Lake chips like the Intel Core i7-8500Y”
The point is, manufacturers didn’t really embrace Core Y chips. For some reason. Will they embrace Lakefield?
Yes. The price of the i5-l16g7 is equal the price of the i5-10210u . The very good present for the amateurs of the low power . But graphic 11 , but lte intel xmm7660 , 2 display out , Intel wifi 6 ax200 . It is – for creating windophone . It is exactly what I need for creation perfect pocket 3d audio . I want it now .